Qinghua, Wei Shaojun and Liu Leibo put forward a new method of hardware / software co design
Qinghua, Wei Shaojun and Liu Leibo put forward a new method of hardware / software co design
Reconfigurable computing chip is one of the important development direction of future computing chips recognized, in the "Silicon realization" (i.e., silicon material made of integrated circuit) can change its operation and interconnection function, can realize the application of the task to the space mapping calculation engine, with high efficiency of instruction processor and high flexibility asic. However, due to the "figure" and "sparse matrix computation" as the representative of the irregular applications in such chip program development is very difficult, the international academic and industrial circles for a long time is generally believed that the reconfigurable computing chip in the defects of programming. If this problem is not solved, it will seriously restrict the popularization and application of reconfigurable computing chip, and will greatly limit the further development of the methodology of reconfigurable hardware / software codesign. To solve this problem, the Wei Shaojun and Liu Leibo team of Microelectronics Institute proposed a hardware / software co design method based on the characteristics of the hardware architecture and designed the programming model for specific application domains. Firstly, the computational model of irregular applications is analyzed, and a reconfigurable programming model for irregular applications is established. Under the model, an irregular application is declared as a set of tasks that can be executed in parallel, and the dependencies between tasks are described by rules. Programmers can use this rule to describe dependencies between tasks, and in what circumstances can they be established. Then, the application task will be automatically converted to hardware acceleration logic on the reconfigurable computing architecture (as shown below). The task corresponds to one or more concurrent pipelining, which enables synchronization of fine grained pipelined parallelism by evaluating rules at runtime. Experimental results show that the speedup obtained by this method is equivalent to that of the most advanced high-performance server CPU at present, and is far superior to the existing automatic generation results by high level synthesis on reconfigurable computing architectures. This method has successfully solved the irregular recognized efficient execution of applications in reconfigurable computing architecture on the international problem, greatly improving the reconfigurable computing chip programmable, the chip in a wider range of application to clear away the obstacles, as well as the direction of development of hardware and software collaborative design methodology paved the road. Wei Shaojun, Liu Leibo. A major breakthrough in the team in the reconfigurable computing chip made on the one hand, depends on the calculation of the long-term and in-depth field accumulated in the reconfigurable on the team, on the other hand, it is closely related with the team and the American Intel company of major scientific research cooperation projects. In January 2016, Tsinghua University signed an agreement with Intel to announce the joint development of a new universal CPU that combines Tsinghua reconfigurable computing technology and Intel X86 architecture". Intel, which has spent 3 years investing in the Tsinghua University, aims to achieve large-scale applications of reconfigurable computing technology in commercial areas such as cloud computing and data centers. This is the first time that Intel has been working directly with universities to develop high performance CPU products worldwide. It is also one of the largest single R & D investments for universities in the world. The project has made important progress, released in April this year, the reference design platform of software and hardware (as shown below), CPU will sample the next process. The International Conference on computer architecture is an important meeting in the field of computer architecture. Many basic ideas of modern computing chips, such as superscalar architecture, multi-level caching, synchronous multithreading and cache coherency, were first proposed at the International Conference on computer architecture. The paper was read by Li Zhaoshi at the meeting, and his correspondent is Liu Leibo, associate professor, author of the thesis, including Deng Yangdong, an associate professor at the Software Institute of Tsinghua University and an associate professor of microelectronics. The microelectronics team, Wei Shaojun, Liu Leibo and Yin Shouyi, has been working on long-term research and development in reconfigurable computing. From 11th Five-Year to 13th Five-Year won the National Natural Science Fund, 863 key projects and key national projects support: Transactions of the International Association of electrical and electronic engineers in five years (IEEETransactions) near 40 papers of important international conferences around 30 papers, patents nearly 40, published "reconfigurable the calculation of" 1. The key technologies include serial application in the field of information security chip, programmable logic device and wearable computing chip.
